Evolution of Integrated Circuits

Background

– VLSI is pretty new; it has its beginning back in the early 60's with SSI, small scale integration, when a few bipolar transistors and resistors were fabricated on the same chip. Today chips are both simpler and more complex. They typically only contain two active elements (nMOS and pMOS transistors) and wires. But there might be billions of these transistors on the chip, and these chips can do amazing functions. You also find chips in everything. This lecture will look at why this has happened and what it hard about VLSI design.

Why Integrated Circuits?

• Break this question into two questions
– Why electronics
– Why use ICs to build electronics
• Why use electronics
– Electrons are easy to move / control
• Easier to move/control electrons than real stuff
– Move information, not things (phone, fax, WWW, etc.)
• Takes much less energy and $

From Tubes

1945 ENIAC filled an entire room!
17,468 vacuum tubes, 70,000 resistors, and 10,000 capacitors
6,000 manual switches and many blinking lights! could add 5,000 numbers in a single second.

To Transistors
1947
Point-contact transistor
1954
first computer with no tube, 800 transistors and 10,000 germanium crystal rectifiers. only 100 watts.

TX-0 (MIT) and the Transistor 1 (Manchester)













What is an Integrated Circuit?

• A device having multiple electrical components and their
interconnects manufactured on a single substrate.
• First IC 1958
– Jack Kilby at TI
– Germanium
– Wax support
– Made history










First Useful IC 1961

• Planar Process (Fairchild)
– Bob Noyce
– Silicon
• People initially named things
– SSI – Small scale
• 60’s
– MSI – Medium scale
• Early 70’s
– LSI – Large scale
• Late 70s
– VLSI – Very large scale
• Early 80’s











Electronics

• Building electronics:
– Started with tubes, then miniature tubes
– Transistors, then miniature transistors
– Components were getting cheaper, but:
• There is a minimum cost of a component (storage, handling …)
• Total system cost was proportional to complexity
• Integrated circuits changed that
– Printed a circuit, like you print a picture,
• Create components in parallel
• Cost no longer depended on # of devices
– What happens as resolution goes up?

Moore’s Law













• Original “law”: number of components on IC doubles every year
• Later modified to doubling every 18 months, later to 2 years, etc

Moore’s Law Today












• International Technology Roadmap for Semiconductors (ITRS)
– Projects roadmap for next 15 years
• Defined in terms of “Technology Nodes”
– Lithography of DRAM half pitch
• 2001 => 130nm (130nm)
• 2004 => 90nm
• 2013 => 32nm

Moore’s Law

First stated by Intel’s Gordon Moore in the mid 60’s. Saw that the resolution of the printing process was improving exponentially (0.7x feature size every 3 years) and predicted that it would continue into the future Since the cost of the printing process (called wafer fabrication) was growing at a modest rate, it implied that the cost per function, was dropping exponentially. At each new generations, each gate cost about 1/2 what it did 3 years ago. Shrinking an existing chip makes it cheaper!

Average Transistor Cost











How Much Can We Put on a Chip?











• An incredible number of gates
• Caveat: these are upper bounds
– Dies this big don’t yield well (if at all)
– 300l2 gate is minimum size
– DRAM cell efficiency is only about 50%
• One 12 inch DRAM wafer in 2013 will contain about 4 trillion bits (!)

Perspective: In Your Lifetime

• Most of you were born 1983 +- a few years
• Cray-1: world’s fastest computer 1976-1982
– 64Mb memory (50ns cycle time)
– 40Kb register (6ns cycle time)
– ~1 million gates (4/5 input NAND)
– 80MHz clock
– 115kW
• In 90nm technology
– 64Mb => 9mm2
– 1 million NAND-4 gates => 4mm2
– 40Kb register => 0.13mm2
– Fits in a 3.5mm x 3.5mm die











Good News, but…

• Some things getting worse with each generation:
– Complexity
• How do you know it will do what you really want in the end
– Power
• Need to worry about how to dissipate the heat
• Supply the energy (and route it to the needed place)
– Noise – Signal integrity, smaller margins, coupling
– Robustness / Reliability
• Soft errors, hard errors, defects, variations
– Non recurring engineering costs (NRE)
• Design time, CAD tools
• Mask costs (tooling needed to create IC)
• NRE fabrication charges (fabs are VERY expensive)

The Bad News

• Although the cost of manufacturing IC's
remained approximately constant, the
design cost did not. In fact, while designer
productivity has improved with time, it has
not increased a the same rate as the
complexity of the chips.
• So the cost of the chip design is growing
exponentially with the complexity of the
circuit. The integrating of a system on a
piece of silicon has an attractive
manufacturing cost but frightening design
cost and risk. Need to build very complex
stuff.
• Many chip costs are dominated by
amortized design cost and not fabrication
cost. ASIC design is $10-20M/chip, custom
design is larger than that











One Way Out: Use a Microprocessor
(Someone Else Paid For the VLSI Design)

• Pros:
– Intel and AMD have giant design teams – leverage them
– Cost of large support infrastructure spread over huge user community
– Tons of different micros
• From ARM to Intel, and don’t forget all the microcontrollers and DSPs
• Established software for most of them
• Cons:
– General purpose computer
• Not tuned to your application
• Not as efficient in execution
– Bad at bit twiddling
– But if it is good enough
• It will be a cheaper solution
• Unless you sell 1M units












Option 2: A Field Programmable Gate Array (FPGA)











• Configurable logic gates pre-fabricated with reconfigurable interconnect
– Now Xilinx and Altera have paid for the design cost
– And cost to build the support tools
• Pros:
– No NRE for the chip
– Very fast turnaround, easier to fix mistakes
– Configurations for often used functions readily available
– Can design at the gate level
• Cons:
– Practical number of usable gates is about 1 million at 0.13µ
• Reaching a clock frequency of 150MHz is doing well
• Power is typically 3x that of comparable Application Specific IC (ASIC)
– Chip cost for high-end parts is very high

Creating a Chip of Your Own

• Process is deceptively simple
– Similar to printing
• Choose a fabrication company (“fab”)
– Like choosing a printer
• Produce a set of negatives (“masks”)
– Like creating color layers
• 4 negatives for transistors
• 2 negatives per layer of wiring
• Send negatives and $$$ to fab
– Much more $$$ than printing
• Wait 2-3 months for fabrication
– Much slower than printing
• Package and test chips











The Hard Part – Managing Complexity

• Chips have zero tolerance for errors
• The previous example had eight polygons and two transistors
– A real design will have
• At least 1 million polygons and 100K transistors
• Any single error in any of the polygons can ruin the chip
• Easy to violate your power budget, speed target
• Mistakes are really expensive
– A full set of masks for 0.13µ is about $600,000
• No one person can really comprehend 1 million of anything
– much less 1 billion

VLSI Design – Complexity Management

• Simplify the design problem
– Create abstractions
• Simplified model for a thing,
• Works well in some subset of the design space
– Constraint designers – Create design methodology
• Needed to ensure that the abstractions are valid
• Might work if you violate constraints, but guarantees are off
– Enforce constraints
• Create tools to check the constraints
• Understand the underlying technology
– Provide a feeling for what abstractions and constraints are needed
– Determine efficient solutions (in design time, or implementation
area, power, or performance).